Nivedita Jaiswal, Radheshyam Gamad. Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication. In Proceedings of the Sixth International Conference on Computer and Communication Technology 2015, ICCCT 2015, Allahabad, India, September 25-27, 2015. pages 286-291, ACM, 2015. [doi]
@inproceedings{JaiswalG15,
title = {Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication},
author = {Nivedita Jaiswal and Radheshyam Gamad},
year = {2015},
doi = {10.1145/2818567.2818659},
url = {https://doi.org/10.1145/2818567.2818659},
researchr = {https://researchr.org/publication/JaiswalG15},
cites = {0},
citedby = {0},
pages = {286-291},
booktitle = {Proceedings of the Sixth International Conference on Computer and Communication Technology 2015, ICCCT 2015, Allahabad, India, September 25-27, 2015},
publisher = {ACM},
isbn = {978-1-4503-3552-2},
}