Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication - researchr publication

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Nivedita Jaiswal, Radheshyam Gamad. Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication. In Proceedings of the Sixth International Conference on Computer and Communication Technology 2015, ICCCT 2015, Allahabad, India, September 25-27, 2015. pages 286-291, ACM, 2015. [doi]

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