Manish Kumar Jaiswal, Hayden Kwok-Hay So. Universal number posit arithmetic generator on FPGA. In 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018. pages 1159-1162, IEEE, 2018. [doi]
@inproceedings{JaiswalS18-0,
title = {Universal number posit arithmetic generator on FPGA},
author = {Manish Kumar Jaiswal and Hayden Kwok-Hay So},
year = {2018},
doi = {10.23919/DATE.2018.8342187},
url = {https://doi.org/10.23919/DATE.2018.8342187},
researchr = {https://researchr.org/publication/JaiswalS18-0},
cites = {0},
citedby = {0},
pages = {1159-1162},
booktitle = {2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018},
publisher = {IEEE},
isbn = {978-3-9819263-0-9},
}