From signal temporal logic to FPGA monitors

Stefan Jaksic, Ezio Bartocci, Radu Grosu, Reinhard Kloibhofer, Thang Nguyen, Dejan Nickovic. From signal temporal logic to FPGA monitors. In 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015. pages 218-227, IEEE, 2015. [doi]

@inproceedings{JaksicBGKNN15,
  title = {From signal temporal logic to FPGA monitors},
  author = {Stefan Jaksic and Ezio Bartocci and Radu Grosu and Reinhard Kloibhofer and Thang Nguyen and Dejan Nickovic},
  year = {2015},
  doi = {10.1109/MEMCOD.2015.7340489},
  url = {http://dx.doi.org/10.1109/MEMCOD.2015.7340489},
  researchr = {https://researchr.org/publication/JaksicBGKNN15},
  cites = {0},
  citedby = {0},
  pages = {218-227},
  booktitle = {13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015},
  publisher = {IEEE},
  isbn = {978-1-5090-0237-5},
}