Abstract is missing.
- Keynote talk I: Syntax-guided synthesisRajeev Alur. 1 [doi]
- Local and global fairness in concurrent systemsAlon Brook, Doron Peled, Sven Schewe. 2-9 [doi]
- SCEst: Sequentially constructive esterelKarsten Rathlev, Steven Smyth, Christian Motika, Reinhard von Hanxleden, Michael Mendler. 10-19 [doi]
- Design and verification of multi-rate distributed systemsWenchao Li, Léonard Gérard, Natarajan Shankar. 20-29 [doi]
- Optimized distributed implementation of timed component-based systemsAhlem Triki, Jacques Combaz, Saddek Bensalem. 30-35 [doi]
- Towards refinement types for time-dependent data-flow networksJean-Pierre Talpin, Pierre Jouvelot, Sandeep Kumar Shukla. 36-41 [doi]
- C-to-Verilog translation validationAlan Leung, Dimitar Bounov, Sorin Lerner. 42-47 [doi]
- MEMOCODE 2015 design contest: Continuous skyline computationPeter Milder. 48-51 [doi]
- Efficient implementation of continuous skyline computation on a multi-core processorKenichi Koizumi, Mary Inaba, Kei Hiraki. 52-55 [doi]
- Efficient continuous skyline computation on multi-core processors based on Manhattan distanceEhsan Montahaie, Milad Ghafouri, Saied Rahmani, Hanie Ghasemi, Farzad Sharif Bakhtiar, Rashid Zamanshoar, Kianoush Jafari, Mohsen Gavahi, Reza Mirzaei, Armin Ahmadzadeh, Saeid Gorgin. 56-59 [doi]
- Keynote talk II: Accelerating data centers using reconfigurable logicDerek Chiou. 60 [doi]
- Modeling and verifying context-aware non-monotonic reasoning agentsAbdur Rakib, Hafiz Mahfooz Ul Haque. 61-69 [doi]
- Metric interval temporal logic specification elicitation and debuggingAdel Dokhanchi, Bardh Hoxha, Georgios E. Fainekos. 70-79 [doi]
- Formal validation and verification of a medical software critical componentPaolo Arcaini, Silvia Bonfanti, Angelo Gargantini, Atif Mashkoor, Elvinia Riccobene. 80-89 [doi]
- Hierarchical multi-formalism proofs of cyber-physical systemsMichael W. Whalen, Sanjai Rayadurgam, Elaheh Ghassabani, Anitha Murugesan, Oleg Sokolsky, Mats Per Erik Heimdahl, Insup Lee. 90-95 [doi]
- Modeling resource sharing using FSM-SADFJoão Bastos, Sander Stuijk, Jeroen Voeten, Ramon R. H. Schiffelers, Johan Jacobs, Henk Corporaal. 96-101 [doi]
- Logic analysis and optimization with quick identification of invariants through one time frame analysisMasahiro Fujita. 102-107 [doi]
- Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCLDavid J. Greaves. 108-117 [doi]
- Compositional design of asynchronous circuits from behavioural conceptsJonathan Beaumont, Andrey Mokhov, Danil Sokolov, Alex Yakovlev. 118-127 [doi]
- A generic synthesisable test benchMatthew Naylor, Simon W. Moore. 128-137 [doi]
- Passive testing of production systems based on model inferenceWilliam Durand, Sébastien Salva. 138-147 [doi]
- Model and program repair via SAT solvingPaul C. Attie, Ali Cherri, Kinan Dak Al Bab, Mohamad Sakr, Jad Saklawi. 148-157 [doi]
- On the deployment problem of embedded systemsStefan Kugele, Gheorghe Pucea, Ramona Popa, Laurent Dieudonné, Horst Eckardt. 158-167 [doi]
- Keynote Talk III: A formal methods perspective on product line engineeringPaul Clements. 168 [doi]
- Reducing power with activity trigger analysisJan Láník, Julien Legriel, Erwan Piriou, Emmanuel Viaud, Fahim Rahim, Oded Maler, Solaiman Rahim. 169-178 [doi]
- Implementing latency-insensitive dataflow blocksBingyi Cao, Kenneth A. Ross, Martha A. Kim, Stephen A. Edwards. 179-187 [doi]
- Symbolic loop parallelization for balancing I/O and memory accesses on processor arraysAlexandru Tanase, Michael Witterauf, Jürgen Teich, Frank Hannig. 188-197 [doi]
- Process algebra semantics & reachability analysis for micro-architectural models of communication fabricsSanne Wouda, Sebastiaan J. C. Joosten, Julien Schmaltz. 198-207 [doi]
- Automatic and configurable instrumentation of C programs with temporal assertion checkersMartial Chabot, Kévin Mazet, Laurence Pierre. 208-217 [doi]
- From signal temporal logic to FPGA monitorsStefan Jaksic, Ezio Bartocci, Radu Grosu, Reinhard Kloibhofer, Thang Nguyen, Dejan Nickovic. 218-227 [doi]
- From non-zenoness verification to terminationPierre Ganty, Samir Genaim, Ratan Lal, Pavithra Prabhakar. 228-237 [doi]
- Verification condition generation for hybrid systemsXian Li, Klaus Schneider 0001. 238-247 [doi]
- Towards verification of hybrid systems in a foundational proof assistantDaniel Ricketts, Gregory Malecha, Mario M. Alvarez, Vignesh Gowda, Sorin Lerner. 248-257 [doi]