C-to-Verilog translation validation - researchr publication

researchr

You are not signed in
Sign in
Sign up

Alan Leung, Dimitar Bounov, Sorin Lerner. C-to-Verilog translation validation. In 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015. pages 42-47, IEEE, 2015. [doi]

Abstract is missing.

runs on WebDSL