A Verilog RTL Synthesis Tool for Heterogeneous FPGAs - researchr publication

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Peter Jamieson, Jonathan Rose. A Verilog RTL Synthesis Tool for Heterogeneous FPGAs. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 305-310, IEEE, 2005.

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