A new approach to minimize leakage power in nano-scale VLSI adder

P. Jamwal, M. B. Srinivas, G. V. K. Sarma, M. M. Krishna. A new approach to minimize leakage power in nano-scale VLSI adder. In B. K. Mishra, editor, Proceedings of the ICWET 10 International Conference & Workshop on Emerging Trends in Technology, Mumbai, Maharashtra, India, February 26 - 27, 2010. pages 880-886, ACM, 2010. [doi]

Authors

P. Jamwal

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M. B. Srinivas

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G. V. K. Sarma

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M. M. Krishna

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