The Design and Implementation of a 2048-Bit RSA Encryption/Decryption Chip

Gene Eu Jan, Lokar J. Y. Lin, W. R. Liou, Y. Y. Chen. The Design and Implementation of a 2048-Bit RSA Encryption/Decryption Chip. In Hamid R. Arabnia, Laurence Tianruo Yang, editors, Proceedings of the International Conference on VLSI, VLSI 03, June 23 - 26, 2003, Las Vegas, Nevada, USA. pages 329-338, CSREA Press, 2003.

@inproceedings{JanLLC03,
  title = {The Design and Implementation of a 2048-Bit RSA Encryption/Decryption Chip},
  author = {Gene Eu Jan and Lokar J. Y. Lin and W. R. Liou and Y. Y. Chen},
  year = {2003},
  tags = {design},
  researchr = {https://researchr.org/publication/JanLLC03},
  cites = {0},
  citedby = {0},
  pages = {329-338},
  booktitle = {Proceedings of the International Conference on VLSI, VLSI  03, June 23 - 26, 2003, Las Vegas, Nevada, USA},
  editor = {Hamid R. Arabnia and Laurence Tianruo Yang},
  publisher = {CSREA Press},
  isbn = {1-932415-10-6},
}