A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture

Young-Jin Jang, Chan-Ho Park, Hyon-Soo Lee. A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture. In ICPADS. pages 18-24, 1998. [doi]

Authors

Young-Jin Jang

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Chan-Ho Park

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Hyon-Soo Lee

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