A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture

Young-Jin Jang, Chan-Ho Park, Hyon-Soo Lee. A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture. In ICPADS. pages 18-24, 1998. [doi]

Abstract

Abstract is missing.