Yong-Ju Jang, Yoan Shin, Min-Cheol Hong, Jae-Kyung Wee, Seongsoo Lee. Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown. In David A. Bader, Manish Parashar, Sridhar Varadarajan, Viktor K. Prasanna, editors, High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings. Volume 3769 of Lecture Notes in Computer Science, pages 398-406, Springer, 2005. [doi]
@inproceedings{JangSHWL05,
title = {Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown},
author = {Yong-Ju Jang and Yoan Shin and Min-Cheol Hong and Jae-Kyung Wee and Seongsoo Lee},
year = {2005},
doi = {10.1007/11602569_42},
url = {http://dx.doi.org/10.1007/11602569_42},
tags = {design},
researchr = {https://researchr.org/publication/JangSHWL05},
cites = {0},
citedby = {0},
pages = {398-406},
booktitle = {High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings},
editor = {David A. Bader and Manish Parashar and Sridhar Varadarajan and Viktor K. Prasanna},
volume = {3769},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-30936-5},
}