Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies

M. Reza Javaheri, Reza Sedaghat. Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies. Microelectronics Reliability, 49(2):178-185, 2009. [doi]

@article{JavaheriS09,
  title = {Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies},
  author = {M. Reza Javaheri and Reza Sedaghat},
  year = {2009},
  doi = {10.1016/j.microrel.2008.11.010},
  url = {http://dx.doi.org/10.1016/j.microrel.2008.11.010},
  tags = {testing, source-to-source, logic, open-source},
  researchr = {https://researchr.org/publication/JavaheriS09},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {49},
  number = {2},
  pages = {178-185},
}