Implementing GCD Systolic Arrays on FPGA

Tudor Jebelean. Implementing GCD Systolic Arrays on FPGA. In Reiner W. Hartenstein, Michal Servít, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 132-134, Springer, 1994.

@inproceedings{Jebelean94:0,
  title = {Implementing GCD Systolic Arrays on FPGA},
  author = {Tudor Jebelean},
  year = {1994},
  researchr = {https://researchr.org/publication/Jebelean94%3A0},
  cites = {0},
  citedby = {0},
  pages = {132-134},
  booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL  94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
  editor = {Reiner W. Hartenstein and Michal Servít},
  volume = {849},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-58419-6},
}