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Implementing GCD Systolic Arrays on FPGA

Tudor Jebelean. Implementing GCD Systolic Arrays on FPGA. In Reiner W. Hartenstein, Michal Servít, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 132-134, Springer, 1994.

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