FPGA Implementation of a Rational Adder

Tudor Jebelean. FPGA Implementation of a Rational Adder. In Will Moore, Wayne Luk, editors, Field-Programmable Logic and Applications, 5th International Workshop, FPL 95, Oxford, UK, August 29 - September 1, 1995, Proceedings. Volume 975 of Lecture Notes in Computer Science, pages 251-260, Springer, 1995.

@inproceedings{Jebelean95:0,
  title = {FPGA Implementation of a Rational Adder},
  author = {Tudor Jebelean},
  year = {1995},
  researchr = {https://researchr.org/publication/Jebelean95%3A0},
  cites = {0},
  citedby = {0},
  pages = {251-260},
  booktitle = {Field-Programmable Logic and Applications, 5th International Workshop, FPL  95, Oxford, UK, August 29 - September 1, 1995, Proceedings},
  editor = {Will Moore and Wayne Luk},
  volume = {975},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-60294-1},
}