Christophe Jégo. FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. In Toomas P. Plaks, editor, Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2009, July 13-16, 2009, Las Vegas Nevada, USA. pages 9-18, CSREA Press, 2009.
@inproceedings{Jego09,
title = {FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems},
author = {Christophe Jégo},
year = {2009},
tags = {systematic-approach},
researchr = {https://researchr.org/publication/Jego09},
cites = {0},
citedby = {0},
pages = {9-18},
booktitle = {Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2009, July 13-16, 2009, Las Vegas Nevada, USA},
editor = {Toomas P. Plaks},
publisher = {CSREA Press},
isbn = {1-60132-101-5},
}