FPGA implementation of FIR filter using M-bit parallel distributed arithmetic - researchr publication

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Shiann Shiun Jeng, Hsing-Chen Lin, Shu-Ming Chang. FPGA implementation of FIR filter using M-bit parallel distributed arithmetic. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

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