A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS - researchr publication authors

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Hyuntak Jeon, Jun-Suk Bang, Yoontae Jung, Taeju Lee, Yeseul Jeon, Seok-Tae Koh, Jaesuk Choi, Doojin Jang, Soonyoung Hong, Minkyu Je. A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018. pages 91-92, IEEE, 2018. [doi]

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