Gyunam Jeon, Yong-Bin Kim. A 4Gb/s half-rate DFE with switched-cap and IIR summation for data correction. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]
@inproceedings{JeonK17-1,
title = {A 4Gb/s half-rate DFE with switched-cap and IIR summation for data correction},
author = {Gyunam Jeon and Yong-Bin Kim},
year = {2017},
doi = {10.1109/ISCAS.2017.8050891},
url = {https://doi.org/10.1109/ISCAS.2017.8050891},
researchr = {https://researchr.org/publication/JeonK17-1},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017},
publisher = {IEEE},
isbn = {978-1-4673-6853-7},
}