Reiley Jeyapaul, Roberto Flores, Alfonso Avila, Aviral Shrivastava. Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability. IEEE Trans. VLSI Syst., 25(2):547-555, 2017. [doi]
@article{JeyapaulFAS17,
title = {Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability},
author = {Reiley Jeyapaul and Roberto Flores and Alfonso Avila and Aviral Shrivastava},
year = {2017},
doi = {10.1109/TVLSI.2016.2574642},
url = {http://dx.doi.org/10.1109/TVLSI.2016.2574642},
researchr = {https://researchr.org/publication/JeyapaulFAS17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {25},
number = {2},
pages = {547-555},
}