An FPGA-based accelerator for deep neural network with novel reconfigurable architecture

Han Jia, Daming Ren, Xuecheng Zou. An FPGA-based accelerator for deep neural network with novel reconfigurable architecture. IEICE Electronic Express, 18(4):20210012, 2021. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.