Weixiong Jiang, Rui Li, Heng Yu, Yajun Ha. An Accurate FPGA Online Delay Monitor Supporting All Timing Paths. In IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020. pages 1-5, IEEE, 2020. [doi]
No references recorded for this publication.
No citations of this publication recorded.