Jiang Jiang, Vincent Mirian, Kam Pui Tang, Paul Chow, Zuocheng Xing. Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture. In Viktor K. Prasanna, Lionel Torres, René Cumplido, editors, ReConFig 09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings. pages 48-53, IEEE Computer Society, 2009. [doi]
@inproceedings{JiangMTCX09,
title = {Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture},
author = {Jiang Jiang and Vincent Mirian and Kam Pui Tang and Paul Chow and Zuocheng Xing},
year = {2009},
doi = {10.1109/ReConFig.2009.30},
url = {http://doi.ieeecomputersociety.org/10.1109/ReConFig.2009.30},
tags = {rule-based, architecture, macros},
researchr = {https://researchr.org/publication/JiangMTCX09},
cites = {0},
citedby = {0},
pages = {48-53},
booktitle = {ReConFig 09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings},
editor = {Viktor K. Prasanna and Lionel Torres and René Cumplido},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-3917-1},
}