Weirong Jiang, Viktor K. Prasanna. A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification. In 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA. pages 24-31, IEEE, 2009. [doi]
Abstract is missing.