Field-split parallel architecture for high performance multi-match packet classification using FPGAs - researchr publication authors

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Weirong Jiang, Viktor K. Prasanna. Field-split parallel architecture for high performance multi-match packet classification using FPGAs. In Friedhelm Meyer auf der Heide, Michael A. Bender, editors, SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallel Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009. pages 188-196, ACM, 2009. [doi]

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