Weirong Jiang, Viktor K. Prasanna. Field-split parallel architecture for high performance multi-match packet classification using FPGAs. In Friedhelm Meyer auf der Heide, Michael A. Bender, editors, SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallel Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009. pages 188-196, ACM, 2009. [doi]
@inproceedings{JiangP09-3,
title = {Field-split parallel architecture for high performance multi-match packet classification using FPGAs},
author = {Weirong Jiang and Viktor K. Prasanna},
year = {2009},
doi = {10.1145/1583991.1584044},
url = {http://doi.acm.org/10.1145/1583991.1584044},
tags = {classification, architecture},
researchr = {https://researchr.org/publication/JiangP09-3},
cites = {0},
citedby = {0},
pages = {188-196},
booktitle = {SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallel Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009},
editor = {Friedhelm Meyer auf der Heide and Michael A. Bender},
publisher = {ACM},
isbn = {978-1-60558-606-9},
}