Hai Jin 0001, Di Chen, Haikun Liu, Xiaofei Liao, Rentong Guo, Yu Zhang 0027. Miss Penalty Aware Cache Replacement for Hybrid Memory Systems. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(12):4669-4682, 2020. [doi]
@article{JinCLLGZ20,
title = {Miss Penalty Aware Cache Replacement for Hybrid Memory Systems},
author = {Hai Jin 0001 and Di Chen and Haikun Liu and Xiaofei Liao and Rentong Guo and Yu Zhang 0027},
year = {2020},
doi = {10.1109/TCAD.2020.2966482},
url = {https://doi.org/10.1109/TCAD.2020.2966482},
researchr = {https://researchr.org/publication/JinCLLGZ20},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {39},
number = {12},
pages = {4669-4682},
}