Engineering of An Assertion-based PSL:::Simple:::-Verilog Dynamic Verifier by Alternating Automata - researchr publication authors

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Naiyong Jin, Chengjie Shen, Jun Chen, Taoyong Ni. Engineering of An Assertion-based PSL:::Simple:::-Verilog Dynamic Verifier by Alternating Automata. Electronic Notes in Theoretical Computer Science, 207:153-169, 2008. [doi]

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