Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, Xiaoyao Liang. Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU. IEEE Trans. VLSI Syst., 25(2):520-533, 2017. [doi]
@article{JingJCZJLL17,
title = {Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU},
author = {Naifeng Jing and Shunning Jiang and Shuang Chen and Jingjie Zhang and Li Jiang and Chao Li and Xiaoyao Liang},
year = {2017},
doi = {10.1109/TVLSI.2016.2584623},
url = {http://dx.doi.org/10.1109/TVLSI.2016.2584623},
researchr = {https://researchr.org/publication/JingJCZJLL17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {25},
number = {2},
pages = {520-533},
}