VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators

Zhaokun Jing, Bonan Yan, Yuchao Yang, Ru Huang. VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap., 69(10):4028-4041, 2022. [doi]

Abstract

Abstract is missing.