2 0.6 V 6 MS/s Low-Power Double Rail-to-Rail SAR ADC in 65-nm CMOS

Yong-Jun Jo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim. 2 0.6 V 6 MS/s Low-Power Double Rail-to-Rail SAR ADC in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs, 68(9):3088-3092, 2021. [doi]

Abstract

Abstract is missing.