NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance

Koh Johguchi, Kasuaki Yoshioka, Ken Takeuchi. NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance. IEICE Transactions, 97-C(4):351-359, 2014. [doi]

@article{JohguchiYT14,
  title = {NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance},
  author = {Koh Johguchi and Kasuaki Yoshioka and Ken Takeuchi},
  year = {2014},
  url = {http://search.ieice.org/bin/summary.php?id=e97-c_4_351},
  researchr = {https://researchr.org/publication/JohguchiYT14},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {97-C},
  number = {4},
  pages = {351-359},
}