A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process - researchr publication authors

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Anup Jose, Valentin Abramzon, Mohamed Elzeftawi, Michael Wang, Kyunglok Kim, Younghoon Song, Shiva Moballegh, Jalil Kamali, Amir Amirkhany. A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process. In IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019. pages 1-4, IEEE, 2019. [doi]

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