Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers - researchr publication authors

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Ashish Joshi, Srirathan Rangisetti, Priyanka Lohray, Tooraj Nikoubin. Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers. In IEEE 9th Annual Computing and Communication Workshop and Conference, CCWC 2019, Las Vegas, NV, USA, January 7-9, 2019. pages 426-434, IEEE, 2019. [doi]

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