A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor

Alan Jrake, Robert M. Senger, Harmander Deogun, Gary D. Carpenter, Soraya Ghiasi, Tuyet Nguyen, Norman James, Michael S. Floyd, Vikas Pokala. A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 398-399, IEEE, 2007. [doi]

Authors

Alan Jrake

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Robert M. Senger

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Harmander Deogun

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Gary D. Carpenter

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Soraya Ghiasi

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Tuyet Nguyen

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Norman James

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Michael S. Floyd

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Vikas Pokala

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