A low-power, high-speed DCT architecture for image compression: Principle and implementation

Maher Jridi, Ayman Alfalou. A low-power, high-speed DCT architecture for image compression: Principle and implementation. In 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010. pages 304-309, IEEE, 2010. [doi]

Abstract

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