Min-rank conjecture for log-depth circuits

Stasys Jukna, Georg Schnitger. Min-rank conjecture for log-depth circuits. J. Comput. Syst. Sci., 77(6):1023-1038, 2011. [doi]

@article{JuknaS11-0,
  title = {Min-rank conjecture for log-depth circuits},
  author = {Stasys Jukna and Georg Schnitger},
  year = {2011},
  doi = {10.1016/j.jcss.2009.09.003},
  url = {http://dx.doi.org/10.1016/j.jcss.2009.09.003},
  researchr = {https://researchr.org/publication/JuknaS11-0},
  cites = {0},
  citedby = {0},
  journal = {J. Comput. Syst. Sci.},
  volume = {77},
  number = {6},
  pages = {1023-1038},
}