Graham A. Jullien, P. D. Bird, J. T. Carr, M. Taheri, William C. Miller. An efficient bit-level systolic cell design for finite ring digital signal processing applications. VLSI Signal Processing, 1(3):189-207, 1989. [doi]
@article{JullienBCTM89,
title = {An efficient bit-level systolic cell design for finite ring digital signal processing applications},
author = {Graham A. Jullien and P. D. Bird and J. T. Carr and M. Taheri and William C. Miller},
year = {1989},
doi = {10.1007/BF02427794},
url = {http://dx.doi.org/10.1007/BF02427794},
tags = {C++, design},
researchr = {https://researchr.org/publication/JullienBCTM89},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {1},
number = {3},
pages = {189-207},
}