Parameterizable Ethernet Network-on-Chip Architecture on FPGA

Helio Fernandes da Cunha Junior, Bruno de Abreu Silva, Vanderlei Bonato. Parameterizable Ethernet Network-on-Chip Architecture on FPGA. In 2015 Euromicro Conference on Digital System Design, DSD 2015, Madeira, Portugal, August 26-28, 2015. pages 263-266, IEEE Computer Society, 2015. [doi]

@inproceedings{JuniorSB15,
  title = {Parameterizable Ethernet Network-on-Chip Architecture on FPGA},
  author = {Helio Fernandes da Cunha Junior and Bruno de Abreu Silva and Vanderlei Bonato},
  year = {2015},
  doi = {10.1109/DSD.2015.101},
  url = {http://dx.doi.org/10.1109/DSD.2015.101},
  researchr = {https://researchr.org/publication/JuniorSB15},
  cites = {0},
  citedby = {0},
  pages = {263-266},
  booktitle = {2015 Euromicro Conference on Digital System Design, DSD 2015, Madeira, Portugal, August 26-28, 2015},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-8035-5},
}