A system-level scheme for resistance drift tolerance of a multilevel phase change memory

Pilin Junsangsri, Jie Han, Fabrizio Lombardi. A system-level scheme for resistance drift tolerance of a multilevel phase change memory. In 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014. pages 63-68, IEEE, 2014. [doi]

@inproceedings{JunsangsriHL14,
  title = {A system-level scheme for resistance drift tolerance of a multilevel phase change memory},
  author = {Pilin Junsangsri and Jie Han and Fabrizio Lombardi},
  year = {2014},
  doi = {10.1109/DFT.2014.6962060},
  url = {http://dx.doi.org/10.1109/DFT.2014.6962060},
  researchr = {https://researchr.org/publication/JunsangsriHL14},
  cites = {0},
  citedby = {0},
  pages = {63-68},
  booktitle = {2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-6155-9},
}