A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects

Naveen Kadayinti, Maryam Shojaei Baghini, Dinesh Kumar Sharma. A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects. In 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017. pages 15-20, IEEE Computer Society, 2017. [doi]

@inproceedings{KadayintiBS17,
  title = {A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects},
  author = {Naveen Kadayinti and Maryam Shojaei Baghini and Dinesh Kumar Sharma},
  year = {2017},
  doi = {10.1109/VLSID.2017.12},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2017.12},
  researchr = {https://researchr.org/publication/KadayintiBS17},
  cites = {0},
  citedby = {0},
  pages = {15-20},
  booktitle = {30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5090-5740-5},
}