Analysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs

Leos Kafka. Analysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs. In Bernd Straube, Milos Drutarovský, Michel Renovell, Peter Gramata, Mária Fischerová, editors, Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008. pages 178-181, IEEE Computer Society, 2008. [doi]

Abstract

Abstract is missing.