FPGA Implementation of 128-Bit Fused Multiply Add Unit for Crypto Processors - researchr publication authors

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Sandeep Kakde, Mithilesh Mahindra, Atish Khobragade, Nikit Shah. FPGA Implementation of 128-Bit Fused Multiply Add Unit for Crypto Processors. In Jemal H. Abawajy, Sougata Mukherjea, Sabu M. Thampi, Antonio Ruiz-Martínez, editors, Security in Computing and Communications - Third International Symposium, SSCC 2015, Kochi, India, August 10-13, 2015. Proceedings. Volume 536 of Communications in Computer and Information Science, pages 78-85, Springer, 2015. [doi]

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