Sandeep Kakde, Mithilesh Mahindra, Atish Khobragade, Nikit Shah. FPGA Implementation of 128-Bit Fused Multiply Add Unit for Crypto Processors. In Jemal H. Abawajy, Sougata Mukherjea, Sabu M. Thampi, Antonio Ruiz-MartÃnez, editors, Security in Computing and Communications - Third International Symposium, SSCC 2015, Kochi, India, August 10-13, 2015. Proceedings. Volume 536 of Communications in Computer and Information Science, pages 78-85, Springer, 2015. [doi]
@inproceedings{KakdeMKS15,
title = {FPGA Implementation of 128-Bit Fused Multiply Add Unit for Crypto Processors},
author = {Sandeep Kakde and Mithilesh Mahindra and Atish Khobragade and Nikit Shah},
year = {2015},
doi = {10.1007/978-3-319-22915-7_8},
url = {http://dx.doi.org/10.1007/978-3-319-22915-7_8},
researchr = {https://researchr.org/publication/KakdeMKS15},
cites = {0},
citedby = {0},
pages = {78-85},
booktitle = {Security in Computing and Communications - Third International Symposium, SSCC 2015, Kochi, India, August 10-13, 2015. Proceedings},
editor = {Jemal H. Abawajy and Sougata Mukherjea and Sabu M. Thampi and Antonio Ruiz-MartÃnez},
volume = {536},
series = {Communications in Computer and Information Science},
publisher = {Springer},
isbn = {978-3-319-22914-0},
}