FPGA based hardware accelerator for KAZE feature extraction algorithm

Lester Kalms, Ahmed Elhossini, Ben H. H. Juurlink. FPGA based hardware accelerator for KAZE feature extraction algorithm. In Yuchen Song, Shaojun Wang, Brent Nelson, Junbao Li, Yu Peng, editors, 2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, December 7-9, 2016. pages 281-284, IEEE, 2016. [doi]

@inproceedings{KalmsEJ16,
  title = {FPGA based hardware accelerator for KAZE feature extraction algorithm},
  author = {Lester Kalms and Ahmed Elhossini and Ben H. H. Juurlink},
  year = {2016},
  doi = {10.1109/FPT.2016.7929553},
  url = {https://doi.org/10.1109/FPT.2016.7929553},
  researchr = {https://researchr.org/publication/KalmsEJ16},
  cites = {0},
  citedby = {0},
  pages = {281-284},
  booktitle = {2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, December 7-9, 2016},
  editor = {Yuchen Song and Shaojun Wang and Brent Nelson and Junbao Li and Yu Peng},
  publisher = {IEEE},
  isbn = {978-1-5090-5602-6},
}