Comparison of Current Suppression Methods to Enhance Short Circuit Capability of 1.2 kV SiC Power MOSFETs: A New Approach using a Series-connected, Gate-Source-Shorted Si Depletion-Mode MOSFET vs Reduced Gate Bias Operation

Ajit Kanale, B. Jayant Baliga. Comparison of Current Suppression Methods to Enhance Short Circuit Capability of 1.2 kV SiC Power MOSFETs: A New Approach using a Series-connected, Gate-Source-Shorted Si Depletion-Mode MOSFET vs Reduced Gate Bias Operation. In IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society, Lisbon, Portugal, October 14-17, 2019. pages 5114-5119, IEEE, 2019. [doi]

@inproceedings{KanaleB19,
  title = {Comparison of Current Suppression Methods to Enhance Short Circuit Capability of 1.2 kV SiC Power MOSFETs: A New Approach using a Series-connected, Gate-Source-Shorted Si Depletion-Mode MOSFET vs Reduced Gate Bias Operation},
  author = {Ajit Kanale and B. Jayant Baliga},
  year = {2019},
  doi = {10.1109/IECON.2019.8926781},
  url = {https://doi.org/10.1109/IECON.2019.8926781},
  researchr = {https://researchr.org/publication/KanaleB19},
  cites = {0},
  citedby = {0},
  pages = {5114-5119},
  booktitle = {IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society, Lisbon, Portugal, October 14-17, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-4878-6},
}