7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers

Dongku Kang, Woopyo Jeong, Chulbum Kim, Doo-Hyun Kim, Yong-Sung Cho, Kyung-Tae Kang, Jinho Ryu, Kyung-Min Kang, Sungyeon Lee, Wandong Kim, Hanjun Lee, Jaedoeg Yu, Nayoung Choi, Dong-Su Jang, Jeong-Don Ihm, Doo-Gon Kim, Young-Sun Min, Moosung Kim, AnSoo Park, Jae-Ick Son, In-Mo Kim, Pansuk Kwak, Bong-Kil Jung, Doosub Lee, Hyunggon Kim, Hyang-Ja Yang, Dae-Seok Byeon, Ki Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi. 7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 130-131, IEEE, 2016. [doi]

@inproceedings{KangJKKCKRKLKLY16,
  title = {7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers},
  author = {Dongku Kang and Woopyo Jeong and Chulbum Kim and Doo-Hyun Kim and Yong-Sung Cho and Kyung-Tae Kang and Jinho Ryu and Kyung-Min Kang and Sungyeon Lee and Wandong Kim and Hanjun Lee and Jaedoeg Yu and Nayoung Choi and Dong-Su Jang and Jeong-Don Ihm and Doo-Gon Kim and Young-Sun Min and Moosung Kim and AnSoo Park and Jae-Ick Son and In-Mo Kim and Pansuk Kwak and Bong-Kil Jung and Doosub Lee and Hyunggon Kim and Hyang-Ja Yang and Dae-Seok Byeon and Ki Tae Park and Kyehyun Kyung and Jeong-Hyuk Choi},
  year = {2016},
  doi = {10.1109/ISSCC.2016.7417941},
  url = {http://dx.doi.org/10.1109/ISSCC.2016.7417941},
  researchr = {https://researchr.org/publication/KangJKKCKRKLKLY16},
  cites = {0},
  citedby = {0},
  pages = {130-131},
  booktitle = {2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-9467-3},
}