Area, performance, and sensitizable paths [logic design]

Bhanu Kapoor, V. S. S. Nair. Area, performance, and sensitizable paths [logic design]. In Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, GLSV '94, Notre Dame, IN, USA, March 4-5, 1994. pages 222-227, IEEE, 1994. [doi]

@inproceedings{KapoorN94,
  title = {Area, performance, and sensitizable paths [logic design]},
  author = {Bhanu Kapoor and V. S. S. Nair},
  year = {1994},
  doi = {10.1109/GLSV.1994.289965},
  url = {http://dx.doi.org/10.1109/GLSV.1994.289965},
  researchr = {https://researchr.org/publication/KapoorN94},
  cites = {0},
  citedby = {0},
  pages = {222-227},
  booktitle = {Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, GLSV '94, Notre Dame, IN, USA, March 4-5, 1994},
  publisher = {IEEE},
  isbn = {0-8186-5610-7},
}