High-performance, low-latency field-programmable gate array-based floating-point adder and multiplier units in a Virtex 4 - researchr publication references

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Per Karlström, Andreas Ehliar, Dake Liu. High-performance, low-latency field-programmable gate array-based floating-point adder and multiplier units in a Virtex 4. IET Computers & Digital Techniques, 2(4):305-313, 2008. [doi]

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